TY  - BOOK
AU  - Padmanabhan, T.R.
TI  - Design through Verilog HDL
SN  - 9812-53-131-9
U1  - 621.392 PAD 
CY  - New York
PB  - John Wiley & Sons Publisher
KW  - Electrical Engineering
KW  - Verilog HDL
N1  - Faculty, students and Staff
UR  - https://libgen.is/book/index.php?md5=A1A97691407A885D673BF8670892AF3E
ER  -