TY  - BOOK
AU  - Baker, R. Jacob
TI  - CMOS Circuit Design, Layout, and Simulation
SN  - 0-7803-3416-7
U1  - 621.3815 BAK 
CY  - New York
PB  - John Wiley & Sons Publisher
KW  - Electrical Engineering
KW  - CMOS, Circuit Design, Layout, Simulation
N1  - Faculty, students and Staff
UR  - https://libgen.is/book/index.php?md5=43291CC121FFFEF6353CFB81A24DC3BA
ER  -